rt_pci.c

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/*********************************************************************************/
/* This file has been written by Sergio Perez Alcañiz <serpeal@disca.upv.es>     */
/*            Departamento de Informática de Sistemas y Computadores             */
/*            Universidad Politécnica de Valencia                                */
/*            Valencia (Spain)                                                   */
/*                                                                               */
/* The RTL-lwIP project has been supported by the Spanish Government Research    */
/* Office (CICYT) under grant TIC2002-04123-C03-03                               */
/*                                                                               */
/* Copyright (c) March, 2003 SISTEMAS DE TIEMPO REAL EMPOTRADOS, FIABLES Y       */
/* DISTRIBUIDOS BASADOS EN COMPONENTES                                           */
/*                                                                               */
/*  This program is free software; you can redistribute it and/or modify         */
/*  it under the terms of the GNU General Public License as published by         */
/*  the Free Software Foundation; either version 2 of the License, or            */
/*  (at your option) any later version.                                          */
/*                                                                               */
/*  This program is distributed in the hope that it will be useful,              */
/*  but WITHOUT ANY WARRANTY; without even the implied warranty of               */
/*  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the                */
/*  GNU General Public License for more details.                                 */
/*                                                                               */
/*  You should have received a copy of the GNU General Public License            */
/*  along with this program; if not, write to the Free Software                  */
/*  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA    */
/*                                                                               */
/*  Linking RTL-lwIP statically or dynamically with other modules is making a    */
/*  combined work based on RTL-lwIP.  Thus, the terms and conditions of the GNU  */
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/*  RTL-lwIP.                                                                    */
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/*  Note that people who make modified versions of RTL-lwIP are not obligated to */
/*  grant this special exception for their modified versions; it is their choice */
/*  whether to do so.  The GNU General Public License gives permission to        */
/*  release a modified version without this exception; this exception also makes */
/*  it possible to release a modified version which carries forward this         */
/*  exception.                                                                   */
/*                                                                               */
/*  CONTRIBUTORS: -Miguel Masmano Tello <mmasmano@disca.upv.es>                  */
/*                -COMEDI                                                        */
/*                 The Linux Control and Measurement Device Interface            */
/*                 David Schleef <ds@schleef.org>                                */
/*********************************************************************************/

#include <time.h>
#include "rt_pci.h"

#ifdef  CONFIG_PCI_DIRECT
#define  PCIBIOS_SUCCESSFUL                0x00

#define CONFIG_CMD(bus, device_fn, where)   (0x80000000 | (bus << 16) | (device_fn << 8) | (where & ~3))


/***************************************************************************************/
int rt_pci_enable_wake(struct pci_dev *dev, u32 state, int enable)
{
  int pm;
  u16 value;
  
  /* find PCI PM capability in list */
  pm = rt_pci_find_capability(dev, PCI_CAP_ID_PM);
  
  /* If device doesn't support PM Capabilities, but request is to disable
   * wake events, it's a nop; otherwise fail */
  if (!pm) 
    return enable ? -EIO : 0; 
  
  /* Check device's ability to generate PME# */
  rt_pci_read_config_word(dev,pm+PCI_PM_PMC,&value);
  
  value &= PCI_PM_CAP_PME_MASK;
  value >>= ffs(value);   /* First bit of mask */
  
        /* Check if it can generate PME# from requested state. */
  if (!value || !(value & (1 << state))) 
    return enable ? -EINVAL : 0;
  
  rt_pci_read_config_word(dev, pm + PCI_PM_CTRL, &value);
  
  /* Clear PME_Status by writing 1 to it and enable PME# */
  value |= PCI_PM_CTRL_PME_STATUS | PCI_PM_CTRL_PME_ENABLE;
  
  if (!enable)
    value &= ~PCI_PM_CTRL_PME_ENABLE;
  
  rt_pci_write_config_word(dev, pm + PCI_PM_CTRL, value);
  
  return 0;
}


/***************************************************************************************/
int rt_pci_save_state(struct pci_dev *dev, u32 *buffer)
{
        int i;
        if (buffer) {
                /* XXX: 100% dword access ok here? */
                for (i = 0; i < 16; i++)
                        rt_pci_read_config_dword(dev, i * 4,&buffer[i]);
        }
        return 0;
}





/***************************************************************************************/
int rt_pcibios_read_config_byte(unsigned int bus, unsigned int device_fn,
                               unsigned int where, unsigned char *value)
{
    outl(CONFIG_CMD(bus,device_fn,where), 0xCF8);
    *value = inb(0xCFC + (where&3));
    return PCIBIOS_SUCCESSFUL;
}

/***************************************************************************************/
int rt_pcibios_read_config_word (unsigned int bus,
    unsigned int device_fn, unsigned int where, unsigned short *value)
{
    outl(CONFIG_CMD(bus,device_fn,where), 0xCF8);
    *value = inw(0xCFC + (where&2));
    return PCIBIOS_SUCCESSFUL;
}

/***************************************************************************************/
int rt_pcibios_read_config_dword (unsigned int bus, unsigned int device_fn,
                                 unsigned int where, unsigned int *value)
{
    outl(CONFIG_CMD(bus,device_fn,where), 0xCF8);
    *value = inl(0xCFC);
    return PCIBIOS_SUCCESSFUL;
}

/***************************************************************************************/
int rt_pcibios_write_config_byte (unsigned int bus, unsigned int device_fn,
                                 unsigned int where, unsigned char value)
{
    outl(CONFIG_CMD(bus,device_fn,where), 0xCF8);
    outb(value, 0xCFC + (where&3));
    return PCIBIOS_SUCCESSFUL;
}

/***************************************************************************************/
int rt_pcibios_write_config_word (unsigned int bus, unsigned int device_fn,
                                 unsigned int where, unsigned short value)
{
    outl(CONFIG_CMD(bus,device_fn,where), 0xCF8);
    outw(value, 0xCFC + (where&2));
    return PCIBIOS_SUCCESSFUL;
}

/***************************************************************************************/
int rt_pcibios_write_config_dword (unsigned int bus, unsigned int device_fn, unsigned int where, unsigned int value)
{
    outl(CONFIG_CMD(bus,device_fn,where), 0xCF8);
    outl(value, 0xCFC);
    return PCIBIOS_SUCCESSFUL;
}

/***************************************************************************************/
int rt_pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq){
  rt_pcibios_write_config_byte ((int) dev->bus, (int) dev->devfn,
                             PCI_INTERRUPT_LINE, irq);
  rt_pcibios_write_config_byte ((int) dev->bus, (int)dev->devfn,
                             PCI_INTERRUPT_PIN, pin);
  return 1;
}


#undef CONFIG_CMD

#else    /* CONFIG_PCI_DIRECT  no definido */

static struct {
        unsigned long address;
        unsigned short segment;
} bios32_indirect = { 0, KERN_CODE_SEG };

static long pcibios_entry;
static struct {
        unsigned long address;
        unsigned short segment;
} pci_indirect = { 0, KERN_CODE_SEG };

/***************************************************************************************/
static unsigned long bios32_service(unsigned long service)
{
        unsigned char return_code;      /* %al */
        unsigned long address;          /* %ebx */
        unsigned long length;           /* %ecx */
        unsigned long entry;            /* %edx */
        unsigned long flags;

        save_flags(flags);
        __asm__(
#ifdef ABSOLUTE_WITHOUT_ASTERISK
                "lcall (%%edi)"
#else
                "lcall *(%%edi)"
#endif
                : "=a" (return_code),
                  "=b" (address),
                  "=c" (length),
                  "=d" (entry)
                : "0" (service),
                  "1" (0),
                  "D" (&bios32_indirect));
        restore_flags(flags);

        switch (return_code) {
                case 0:
                        return address + entry;
                case 0x80:      /* No presente */
                        ethernet_printf("bios32_service(%d) : no presente\n", service);
                        return 0;
                default: /* No deberia pasar */
                        ethernet_printf("bios32_service(%d) : devuelto %#X\n",
                                service, return_code);
                        return 0;
        }
}

/***************************************************************************************/
int rt_pcibios_read_config_byte(unsigned int bus,
        unsigned int device_fn, unsigned int where, unsigned char *value)
{
        unsigned long ret;
        unsigned long bx = (bus << 8) | device_fn;
        unsigned long flags;

        save_flags(flags);
        __asm__(
#ifdef ABSOLUTE_WITHOUT_ASTERISK
                "lcall (%%esi)\n\t"
#else
                "lcall *(%%esi)\n\t"
#endif
                "jc 1f\n\t"
                "xor %%ah, %%ah\n"
                "1:"
                : "=c" (*value),
                  "=a" (ret)
                : "1" (PCIBIOS_READ_CONFIG_BYTE),
                  "b" (bx),
                  "D" ((long) where),
                  "S" (&pci_indirect));
        restore_flags(flags);
        return (int) (ret & 0xff00) >> 8;
}

/***************************************************************************************/
int rt_pcibios_read_config_word(unsigned int bus,
        unsigned int device_fn, unsigned int where, unsigned short *value)
{
        unsigned long ret;
        unsigned long bx = (bus << 8) | device_fn;
        unsigned long flags;

        save_flags(flags);
        __asm__(
#ifdef ABSOLUTE_WITHOUT_ASTERISK
                "lcall (%%esi)\n\t"
#else
                "lcall *(%%esi)\n\t"
#endif
                "jc 1f\n\t"
                "xor %%ah, %%ah\n"
                "1:"
                : "=c" (*value),
                  "=a" (ret)
                : "1" (PCIBIOS_READ_CONFIG_WORD),
                  "b" (bx),
                  "D" ((long) where),
                  "S" (&pci_indirect));
        restore_flags(flags);
        return (int) (ret & 0xff00) >> 8;
}

/***************************************************************************************/
int rt_pcibios_read_config_dword(unsigned int bus,
        unsigned int device_fn, unsigned int where, unsigned int *value)
{
        unsigned long ret;
        unsigned long bx = (bus << 8) | device_fn;
        unsigned long flags;

        save_flags(flags);
        __asm__(
#ifdef ABSOLUTE_WITHOUT_ASTERISK
                "lcall (%%esi)\n\t"
#else
                "lcall *(%%esi)\n\t"
#endif
                "jc 1f\n\t"
                "xor %%ah, %%ah\n"
                "1:"
                : "=c" (*value),
                  "=a" (ret)
                : "1" (PCIBIOS_READ_CONFIG_DWORD),
                  "b" (bx),
                  "D" ((long) where),
                  "S" (&pci_indirect));
        restore_flags(flags);
        return (int) (ret & 0xff00) >> 8;
}

/***************************************************************************************/
int rt_pcibios_write_config_byte (unsigned int bus,
        unsigned int device_fn, unsigned int where, unsigned char value)
{
        unsigned long ret;
        unsigned long bx = (bus << 8) | device_fn;
        unsigned long flags;

        save_flags(flags); cli();
        __asm__(
#ifdef ABSOLUTE_WITHOUT_ASTERISK
                "lcall (%%esi)\n\t"
#else
                "lcall *(%%esi)\n\t"
#endif
                "jc 1f\n\t"
                "xor %%ah, %%ah\n"
                "1:"
                : "=a" (ret)
                : "0" (PCIBIOS_WRITE_CONFIG_BYTE),
                  "c" (value),
                  "b" (bx),
                  "D" ((long) where),
                  "S" (&pci_indirect));
        restore_flags(flags);
        return (int) (ret & 0xff00) >> 8;
}




/***************************************************************************************/
int rt_pcibios_write_config_word (unsigned int bus,
        unsigned int device_fn, unsigned int where, unsigned short value)
{
        unsigned long ret;
        unsigned long bx = (bus << 8) | device_fn;
        unsigned long flags;

        save_flags(flags); cli();
        __asm__(
#ifdef ABSOLUTE_WITHOUT_ASTERISK
                "lcall (%%esi)\n\t"
#else
                "lcall *(%%esi)\n\t"
#endif
                "jc 1f\n\t"
                "xor %%ah, %%ah\n"
                "1:"
                : "=a" (ret)
                : "0" (PCIBIOS_WRITE_CONFIG_WORD),
                  "c" (value),
                  "b" (bx),
                  "D" ((long) where),
                  "S" (&pci_indirect));
        restore_flags(flags);
        return (int) (ret & 0xff00) >> 8;
}

/***************************************************************************************/
int rt_pcibios_write_config_dword (unsigned int bus,
        unsigned int device_fn, unsigned int where, unsigned int value)
{
        unsigned long ret;
        unsigned long bx = (bus << 8) | device_fn;
        unsigned long flags;

        save_flags(flags); cli();
        __asm__(
#ifdef ABSOLUTE_WITHOUT_ASTERISK
                "lcall (%%esi)\n\t"
#else
                "lcall *(%%esi)\n\t"
#endif
                "jc 1f\n\t"
                "xor %%ah, %%ah\n"
                "1:"
                : "=a" (ret)
                : "0" (PCIBIOS_WRITE_CONFIG_DWORD),
                  "c" (value),
                  "b" (bx),
                  "D" ((long) where),
                  "S" (&pci_indirect));
        restore_flags(flags);
        return (int) (ret & 0xff00) >> 8;
}

/***************************************************************************************/
static void check_pcibios(void)
{
        unsigned long signature;
        unsigned char present_status;
        unsigned char major_revision;
        unsigned char minor_revision;
        unsigned long flags;
        int pack;

        if ((pcibios_entry = bios32_service(PCI_SERVICE))) {
                pci_indirect.address = pcibios_entry;

                save_flags(flags);
                __asm__(
#ifdef ABSOLUTE_WITHOUT_ASTERISK
                        "lcall (%%edi)\n\t"
#else
                        "lcall *(%%edi)\n\t"
#endif
                        "jc 1f\n\t"
                        "xor %%ah, %%ah\n"
                        "1:\tshl $8, %%eax\n\t"
                        "movw %%bx, %%ax"
                        : "=d" (signature),
                          "=a" (pack)
                        : "1" (PCIBIOS_PCI_BIOS_PRESENT),
                          "D" (&pci_indirect)
                        : "bx", "cx");
                restore_flags(flags);

                present_status = (pack >> 16) & 0xff;
                major_revision = (pack >> 8) & 0xff;
                minor_revision = pack & 0xff;
                if (present_status || (signature != PCI_SIGNATURE)) {
                        printf("ERROR: BIOS32 dice PCI BIOS, pero no PCI "
                                "BIOS????\n");
                        pcibios_entry = 0;
                }
#if     DEBUG
                if (pcibios_entry) {
                        printf ("pcibios_init : PCI BIOS revision %hhX.%hhX"
                                " entrada en %#X\n", major_revision,
                                minor_revision, pcibios_entry);
                }
#endif
        }
}

/***************************************************************************************/
static void pcibios_init(void)
{
        union bios32 *check;
        unsigned char sum;
        int i, length;
        unsigned long bios32_entry = 0;

        /*
          El procedimiento estandar para localizar el directorio de 
          servicios de BIOS32 se tiene que escanear una estructura BIOS32
          valida entre los rangos 0xE0000 0xFFFFF
         */

        for (check = (union bios32 *) 0xe0000; check <= (union bios32 *) 0xffff0; ++check) {
                if (check->fields.signature != BIOS32_SIGNATURE)
                        continue;
                length = check->fields.length * 16;
                if (!length)
                        continue;
                sum = 0;
                for (i = 0; i < length ; ++i)
                        sum += check->chars[i];
                if (sum != 0)
                        continue;
                if (check->fields.revision != 0) {
                        printf("pcibios_init : revision no soportada %d en %#X\n", check->fields.revision,(unsigned int) check);
                        continue;
                }
#if     DEBUG
                printf("pcibios_init : BIOS32 Service Directory "
                        "estructura en %#X\n", check);
#endif
                if (!bios32_entry) {
                        if (check->fields.entry >= 0x100000) {
                          printf("pcibios_init: entrada en la memoria alta\n");
                                return;
                        } else {
                                bios32_entry = check->fields.entry;
#if     DEBUG
                                printf("pcibios_init : BIOS32 Service Directory \nentrada en %#X\n", bios32_entry);
#endif
                                bios32_indirect.address = bios32_entry;
                        }
                }
        }
        if (bios32_entry)
                check_pcibios();
}

/***************************************************************************************/
int pcibios_set_irq_routing(struct pci_dev *dev, int pin, int irq)
{
        int ret;

        __asm__(
#ifdef ABSOLUTE_WITHOUT_ASTERISK
                "lcall (%%esi); cld\n\t"
#else
                "lcall *(%%esi); cld\n\t"
#endif
                "jc 1f\n\t"
                "xor %%ah, %%ah\n"
                "1:"
                : "=a" (ret)
                : "0" (PCIBIOS_SET_PCI_HW_INT),
                  "b" ((dev->bus << 8) | dev->devfn),
                  "c" ((irq << 8) | (pin + 10)),
                  "S" (&pci_indirect));
        return !(ret & 0xff00);
}

#endif  /* CONFIG_PCI_DIRECT no definido */


/***************************************************************************************/
int rt_pci_set_power_state(struct pci_dev *dev, int state)
{
        int pm;
        u16 pmcsr;

        /* bound the state we're entering */
        if (state > 3) state = 3;

        /* Validate current state:
         * Can enter D0 from any state, but if we can only go deeper 
         * to sleep if we're already in a low power state
         */
        if (state > 0 && dev->current_state > state)
                return -EINVAL;
        else if (dev->current_state == state) 
                return 0;        /* we're already there */

        /* find PCI PM capability in list */
        pm = rt_pci_find_capability(dev, PCI_CAP_ID_PM);
        
        /* abort if the device doesn't support PM capabilities */
        if (!pm) return -EIO; 

        /* check if this device supports the desired state */
        if (state == 1 || state == 2) {
                u16 pmc;
                rt_pci_read_config_word(dev,pm + PCI_PM_PMC,&pmc);
                if (state == 1 && !(pmc & PCI_PM_CAP_D1)) return -EIO;
                else if (state == 2 && !(pmc & PCI_PM_CAP_D2)) return -EIO;
        }

        /* If we're in D3, force entire word to 0.
         * This doesn't affect PME_Status, disables PME_En, and
         * sets PowerState to 0.
         */
        if (dev->current_state >= 3)
                pmcsr = 0;
        else {
                rt_pci_read_config_word(dev, pm + PCI_PM_CTRL, &pmcsr);
                pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
                pmcsr |= state;
        }

        /* enter specified state */
        rt_pci_write_config_word(dev, pm + PCI_PM_CTRL, pmcsr);

        /* Mandatory power management transition delays */
        /* see PCI PM 1.1 5.6.1 table 18 */
        if(state == 3 || dev->current_state == 3)
        {
                //set_current_state(TASK_UNINTERRUPTIBLE);
                //schedule_timeout(HZ/100);
          rtl_delay(200000);
        }
        else if(state == 2 || dev->current_state == 2)
                rtl_delay(200000);
        dev->current_state = state;

        return 0;
}


int rt_pci_find_capability(struct pci_dev *dev, int cap)
{
        u16 status;
        u8 pos, id;
        int ttl = 48;

        rt_pci_read_config_word(dev, PCI_STATUS, &status);
        if (!(status & PCI_STATUS_CAP_LIST))
                return 0;
        switch (dev->hdr_type) {
        case PCI_HEADER_TYPE_NORMAL:
        case PCI_HEADER_TYPE_BRIDGE:
                rt_pci_read_config_byte(dev, PCI_CAPABILITY_LIST, &pos);
                break;
        case PCI_HEADER_TYPE_CARDBUS:
                rt_pci_read_config_byte(dev, PCI_CB_CAPABILITY_LIST, &pos);
                break;
        default:
                return 0;
        }
        while (ttl-- && pos >= 0x40) {
                pos &= ~3;
                rt_pci_read_config_byte(dev, pos + PCI_CAP_LIST_ID, &id);
                if (id == 0xff)
                        break;
                if (id == cap)
                        return pos;
                rt_pci_read_config_byte(dev, pos + PCI_CAP_LIST_NEXT, &pos);
        }
        return 0;
}


/***************************************************************************************/
/* This function only can be called inside init_module                                 */
/***************************************************************************************/
struct pci_dev * rt_pci_find_device(unsigned int vendor, unsigned int device, const struct pci_dev *from){
  return(pci_find_device(vendor, device, from));
}

/***************************************************************************************/
/* This function only can be called inside init_module                                 */
/***************************************************************************************/
int rt_pci_enable_device(struct pci_dev *dev){
  return(pci_enable_device(dev));
}


/***************************************************************************************/
int rt_pci_restore_state(struct pci_dev *dev, u32 *buffer)
{
        int i;

        if (buffer) {
                for (i = 0; i < 16; i++)
                        rt_pci_write_config_dword(dev,i * 4, buffer[i]);
        }
        /*
         * otherwise, write the context information we know from bootup.
         * This works around a problem where warm-booting from Windows
         * combined with a D3(hot)->D0 transition causes PCI config
         * header data to be forgotten.
         */     
        else {
                for (i = 0; i < 6; i ++)
                        rt_pci_write_config_dword(dev,
                                               PCI_BASE_ADDRESS_0 + (i * 4),
                                               dev->resource[i].start);
                rt_pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
        }
        return 0;
}

---